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浏览/检索结果: 共4条，第1-4条 帮助 已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择作者升序作者降序题名升序题名降序发表日期升序发表日期降序提交时间升序提交时间降序 Radiation-Hardening Techniques for Spin Orbit Torque-MRAM Peripheral Circuitry 期刊论文 IEEE TRANSACTIONS ON MAGNETICS, 2018, 卷号: 54 作者:  Wang, Bi;  Wang, Zhaohao;  Hu, Chunyan;  Zhao, Yuanfu;  Zhang, Youguang 收藏  |  浏览/下载：11/0  |  提交时间：2019/12/30 Double-node upset (DNU)  peripheral circuitry  radiation hardening by design  single-event upset (SEU)  spin orbit torque magnetic random access memory (SOT-MRAM)   Single-event transient characterization of a radiation-tolerant charge-pump phase-locked loop fabricated in 130 nm pd-soi technology 期刊论文 Ieee transactions on nuclear science, 2016, 卷号: 63, 期号: 4, 页码: 2402-2408 作者:  Chen, Zhuojun;  Lin, Min;  Zheng, Yunlong;  Wei, Zuodong;  Huang, Shuigen 收藏  |  浏览/下载：42/0  |  提交时间：2019/05/09 Heavy-ion testing  Pd-soi  Phase-locked loop  Pulsed-laser testing  Radiation hardening by design  Single-event transients   Analysis and RHBD technique of single event transients in PLLs 期刊论文 Journal of Semiconductors, 2015, 卷号: 36 作者:  Han, Z.;  Wang, L.;  Yue, S.;  Han, B.;  Du, S. 收藏  |  浏览/下载：9/0  |  提交时间：2019/12/30 Hardening  Hardness  Heavy ions  High electron mobility transistors  Locks (fasteners)  Nanotechnology  Phase locked loops  Radiation effects  Radiation hardening  Reconfigurable hardware  Heavy ion testing  Phase Locked Loop (PLL)  Radiation hardening by design  Radiation hardness  Sensitive components  Single event transients  System levels  Transistor level  Transients   A four-interleaving HBD SRAM cell based on dual DICE for multiple node collection mitigation 期刊论文 Journal of Semiconductors, 2015, 卷号: 36 作者:  Liu, L.;  Yue, S.;  Lu, S. 收藏  |  浏览/下载：19/0  |  提交时间：2019/12/30 Nanotechnology  Radiation hardening  65-nm technologies  CMOS test chip  Hardened-by-design  Multi-nodes  Orders of magnitude  Radiation experiment  SEU cross-section  Single event upsets  Static random access storage