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浏览/检索结果: 共9条，第1-9条 帮助 限定条件 内容类型：其他     已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择作者升序作者降序题名升序题名降序发表日期升序发表日期降序提交时间升序提交时间降序 First foundry platform of complementary tunnel-FETs in CMOS baseline technology for ultralow-power IoT applications: Manufacturability, variability and technology roadmap 其他 2016-01-01 Huang, Qianqian; Jia, Rundong; Chen, Cheng; Zhu, Hao; Guo, Lingyi; Wang, Junyao; Wang, Jiaxin; Wu, Chunlei; Wang, Runsheng; Bu, Weihai; Kang, Jing; Wang, Wenbo; Wu, Hanming; Lee, Shiuh-Wuu; Wang, Yangyuan; Huang, Ru 收藏  |  浏览/下载：6/0  |  提交时间：2017/12/03 Reliability variability simulation methodology for IC design: An EDA perspective 其他 2016-01-01 Zhang, Aixi; Huang, Chunyi; Guo, Tianlei; Chen, Alvin; Guo, Shaofeng; Wang, Runsheng; Huang, Ru; Xie, Jushan 收藏  |  浏览/下载：4/0  |  提交时间：2017/12/03 Deep Insights into Dielectric Breakdown in Tunnel FETs with Awareness of Reliability and Performance Co-Optimization 其他 2016-01-01 Huang, Qianqian; Jia, Rundong; Zhu, Jiadi; Lv, Zhu; Wang, Jiaxin; Chen, Cheng; Zhao, Yang; Wang, Runsheng; Bu, Weihai; Wang, Wenbo; Kang, Jin; Hua, Kelu; Wu, Hanming; Yu, Shaofeng; Wang, Yangyuan; Huang, Ru 收藏  |  浏览/下载：5/0  |  提交时间：2017/12/03 Comprehensive performance re-assessment of TFETs with a novel design by gate and source engineering from device/circuit perspective 其他 2015-01-01 Huang, Qianqian; Huang, Ru; Wu, Chunlei; Zhu, Hao; Chen, Cheng; Wang, Jiaxin; Guo, Lingyi; Wang, Runsheng; Ye, Le; Wang, Yangyuan 收藏  |  浏览/下载：4/0  |  提交时间：2017/12/03 First Foundry Platform of Complementary Tunnel-FETs in CMOS Baseline Technology for Ultralow-Power IoT Applications: Manufacturability, Variability and Technology Roadmap 其他 2015-01-01 Huang, Qianqian; Jia, Rundong; Chen, Cheng; Zhu, Hao; Guo, Lingyi; Wang, Junyao; Wang, Jiaxin; Wu, Chunlei; Wang, Runsheng; Bu, Weihai; Kang, Jing; Wang, Wenbo; Wu, Hanming; Lee, Shiuh-Wuu; Wang, Yangyuan; Huang, Ru 收藏  |  浏览/下载：3/0  |  提交时间：2017/12/03 TRANSISTORS   Reliability variability simulation methodology for IC design: an EDA perspective 其他 2015-01-01 Zhang, Aixi; Huang, Chunyi; Guo, Tianlei; Chen, Alvin; Guo, Shaofeng; Wang, Runsheng; Huang, Ru; Xie, Jushan 收藏  |  浏览/下载：1/0  |  提交时间：2017/12/03 Simulation of correlated line-edge roughness in multi-gate devices 其他 2013-01-01 Jiang, Xiaobo; Wang, Runsheng; Huang, Ru; Chen, Jiang 收藏  |  浏览/下载：4/0  |  提交时间：2015/11/13 Investigations on the Correlation between Line-edge-roughness (LER) and Line-width-roughness (LWR) in Nanoscale CMOS Technology 其他 2012-01-01 Jiang, Xiaobo; Li, Meng; Wang, Runsheng; Chen, Jiang; Huang, Ru 收藏  |  浏览/下载：2/0  |  提交时间：2015/11/13 A new self-aligned BOI (Body-on-insulator) finfet fabricated on bulk SI wafers 其他 2008-01-01 Wang, Runsheng; Xu, Xiaoyan; Zhuge, Jing; Chen, Gang; Wang, Wenhua; Zhang, Xing; Wang, Yangyuan; Huang, Ru 收藏  |  浏览/下载：2/0  |  提交时间：2015/11/13