CORC

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CORC

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Delay-locked loop based clock and data recovery with wide operating range and low jitter in a 65-nm CMOS process 期刊论文
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2017
Wang, Yuan; Liu, Yuequan; Jia, Song; Zhang, Xing
收藏  |  浏览/下载：8/0  |  提交时间：2017/12/03
A Speculative Clock and Data Recovery Architecture for Multi-Gigabit/s Series Links 其他
2016-01-01
Zhao, Tong; Gai, Weixin; Tang, Liangxiao; Shi, Linqi; Zhang, Xing; Zhao, Tong; Gai, Weixin; Tang, Liangxiao; Shi, Linqi
收藏  |  浏览/下载：4/0  |  提交时间：2017/12/03
180.5Mbps-8Gbps DLL-Based Clock and Data Recovery Circuit with Low Jitter Performance 其他
2015-01-01
Liu, Yuequan; Wang, Yuan; Jia, Song; Zhang, Xing
收藏  |  浏览/下载：5/0  |  提交时间：2017/12/03
A reference-less all-digital burst-mode CDR with embedded TDC 其他
2015-01-01
Jiang, Mengyin; Wang, Yuan; Liu, Baoguang; Liu, Yuequan; Jia, Song; Zhang, Xing
收藏  |  浏览/下载：4/0  |  提交时间：2017/12/03
A power efficient 1.0625-3.125 Gb/s serial transceiver in 130 nm digital CMOS for multi-standard applications 期刊论文
SCIENCE CHINA-INFORMATION SCIENCES, 2014
Hou ZhongYuan; Yang Fan; Liu JunHua; Zhang Xing
收藏  |  浏览/下载：3/0  |  提交时间：2017/12/03
A 1.25/2.5/3.125Gbps CDR circuit with a phase interpolator for RapidIO application 其他
2012-01-01
Yang, Hailing; Wang, Yuan; Jia, Song; Zhang, Ganggang; Zhang, Xing
收藏  |  浏览/下载：2/0  |  提交时间：2015/11/13
A clock and data recovery circuit for 3.125Gb/s RapidIO SerDes 其他
2010-01-01
Zhihui, Zhao; Yuan, Wang; Junlei, Zhao; Hailing, Yang; Song, Jia
收藏  |  浏览/下载：4/0  |  提交时间：2015/11/13

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