QQ客服 官方微博 反馈留言

浏览/检索结果: 共16条，第1-10条 帮助 限定条件 内容类型：其他     已选(0)清除 条数/页：5101520253035404550556065707580859095100   排序方式：请选择发表日期升序发表日期降序提交时间升序提交时间降序题名升序题名降序作者升序作者降序 SPMS: Strand based Persistent Memory System 其他 2017-01-01 Li, Shuo; Wang, Peng; Xiao, Nong; Sun, Guangyu; Liu, Fang 收藏  |  浏览/下载：3/0  |  提交时间：2017/12/03 The Applications of NVM Technology in Hardware Security 其他 2016-01-01 Yang, Chaofei; Liu, Beiye; Wang, Yandan; Chen, Yiran; Li, Hai; Zhang, Xian; Sun, Guangyu 收藏  |  浏览/下载：18/0  |  提交时间：2017/12/03 Memristor  spin-transfer torque random access memory  hardware security   NXgraph: An efficient graph processing system on a single machine 其他 2016-01-01 Chi, Yuze; Dai, Guohao; Wang, Yu; Sun, Guangyu; Li, Guoliang; Yang, Huazhong 收藏  |  浏览/下载：4/0  |  提交时间：2017/12/03 NXgraph: An Efficient Graph Processing System on a Single Machine 其他 2016-01-01 Chi, Yuze; Dai, Guohao; Wang, Yu; Sun, Guangyu; Li, Guoliang; Yang, Huazhong 收藏  |  浏览/下载：2/0  |  提交时间：2017/12/03 A Novel PUF based on Cell Error Rate Distribution of STT-RAM 其他 2016-01-01 Zhang, Xian; Sun, Guangyu; Zhang, Yaojun; Chen, Yiran; Li, Hai; Wen, Wujie; Di, Jia 收藏  |  浏览/下载：2/0  |  提交时间：2017/12/03 MEMORY   Performance-centric Register File Design for GPUs using Racetrack Memory 其他 2016-01-01 Wang, Shuo; Liang, Yun; Zhang, Chao; Xie, Xiaolong; Sun, Guangyu; Liu, Yongpan; Wang, Yu; Li, Xiuhong 收藏  |  浏览/下载：5/0  |  提交时间：2017/12/03 EFFICIENT COMPILER FRAMEWORK  CACHE   A STT-RAM-based Low-Power Hybrid Register File for GPGPUs 其他 2015-01-01 Li, Gushu; Chen, Xiaoming; Sun, Guangyu; Hoffmann, Henry; Liu, Yongpan; Wang, Yu; Yang, Huazhong 收藏  |  浏览/下载：9/0  |  提交时间：2017/12/03 General-purpose graphics processing unit (GPGPU)  Spin-torque-transfer random-access memory (STT-RAM)  Hybrid register file  PERFORMANCE  MEMORY  CELL   Enabling Coordinated Register Allocation and Thread-level Parallelism Optimization for GPUs 其他 2015-01-01 Xie, Xiaolong; Liang, Yun; Li, Xiuhong; Wu, Yudong; Sun, Guangyu; Wang, Tao; Fan, Dongrui 收藏  |  浏览/下载：8/0  |  提交时间：2017/12/03 EFFICIENT COMPILER FRAMEWORK  CONTROL FLOW  CACHE  MODEL  PROCESSORS  DIVERGENCE  GPGPUS  FILE   From device to system: Cross-layer design exploration of racetrack memory 其他 2015-01-01 Sun, Guangyu; Zhang, Chao; Li, Hehe; Zhang, Yue; Zhang, Weiqi; Gu, Yizi; Sun, Yinan; Klein, J.-O.; Ravelosona, D.; Liu, Yongpan; Zhao, Weisheng; Yang, Huazhong 收藏  |  浏览/下载：3/0  |  提交时间：2017/12/03 Optimizing FPGA-based accelerator design for deep convolutional neural networks 其他 2015-01-01 Zhang, Chen; Li, Peng; Sun, Guangyu; Guan, Yijin; Xiao, Bingjun; Cong, Jason 收藏  |  浏览/下载：3/0  |  提交时间：2017/12/03