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西安交通大学 [9]

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	Integrating Two Logics Into One Crossbar Array for Logic Gate Design 期刊论文 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2021, 卷号: 68, 期号: 8, 页码: 2987-2991 作者: Yao, Lian; Liu, Peng; Wu, Jigang; Han, Yinhe; Zhong, Yuehang 收藏 \| 浏览/下载：29/0 \| 提交时间：2021/12/01 Logic gates Memristors Logic arrays Resistance Logic functions Adders Switches Logic gates memristive crossbar material implication not material implication 1-bit full adder
	Architecting Effectual Computation for Machine Learning Accelerators 期刊论文 IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 10, 页码: 2654-2667 作者: Lu, Hang; Zhang, Mingzhe; Han, Yinhe; Wang, Qi; Li, Huawei 收藏 \| 浏览/下载：13/0 \| 提交时间：2020/12/10 Computational modeling Throughput Adders Machine learning Acceleration Kernel Computational efficiency Accelerator architectures neural network hardware multiplying circuits
	Effects of current asymmetry on the electron sheath of magnetically-insulated induction voltage adders 期刊论文 Scientia Sinica: Physica, Mechanica et Astronomica, 2018, 卷号: 48 作者: Wei, Hao; Sun, Feng Ju; Qiu, Ai Ci; Hu, Yi Xiang 收藏 \| 浏览/下载：3/0 \| 提交时间：2019/11/26 Current asymmetry Electron sheath Magnetically-insulated induction voltage adders (MIVA) Nonaxisymmetrical magnetic insulation
	The Unbounded Benefit of Encoder Cooperation for the $k$ -User MAC 期刊论文 IEEE Transactions on Information Theory, 2018, 卷号: Vol.64 No.5, 页码: 3655-3678 作者: MichaelLangberg; ParhamNoorzad; MichelleEffros 收藏 \| 浏览/下载：6/0 \| 提交时间：2019/12/24 Decoding Encoding Electronic mail Relays Cost function Adders Conferencing encoders cooperation facilitator cost constraints edge removal problem multiple access channel multivariate covering lemma network information theory
	Sharper Upper Bounds for Unbalanced Uniquely Decodable Code Pairs 期刊论文 IEEE Transactions on Information Theory, 2018, 卷号: Vol.64 No.2, 页码: 1368-1373 作者: PerAustrin; PetteriKaski; JesperNederlof; MikkoKoivisto 收藏 \| 浏览/下载：9/0 \| 提交时间：2019/12/24 Upper bound Computer science Electronic mail Adders Information technology Hypercubes Entropy Additive combinatorics binary adder channel isoperimetric inequality uniquely decodeable code pair zero-error capacity
	Method of optimizing secondary impedances for magnetically-insulated induction voltage adders with impedance under-matched loads 期刊论文 ACTA PHYSICA SINICA, 2017, 卷号: 66 作者: Wei Hao; Sun Feng-Ju; Hu Yi-Xiang; Qiu Ai-Ci 收藏 \| 浏览/下载：2/0 \| 提交时间：2019/11/26 minimal current of magnetic insulation magnetically-insulated induction voltage adders re-trapping of sheath electron flow secondary impedance
	A method to calculate the electron sheath profile of the nonaxisymmetrical magnetic insulation 期刊论文 ACTA PHYSICA SINICA, 2017, 卷号: 66 作者: Wei Hao; Sun Feng-Ju; Hu Yi-Xiang; Liang Tian-Xue; Cong Pei-Tian 收藏 \| 浏览/下载：3/0 \| 提交时间：2019/11/26 asymmetrical distribution of injected currents electron sheath profile magnetically insulated induction voltage adders nonaxisymmetrical magnetic insulation
	The Unbounded Benefit of Encoder Cooperation for the k-user MAC 期刊论文 IEEE Transactions on Information Theory, 2017, 页码: 1 作者: MichaelLangberg; ParhamNoorzad; MichelleEffros 收藏 \| 浏览/下载：4/0 \| 提交时间：2019/12/24 Decoding Encoding Electronic mail Relays Cost function Adders Conferencing encoders cooperation facilitator cost constraints edge removal problem multiple access channel multivariate covering lemma network information theory
	Sharper Upper Bounds for Unbalanced Uniquely Decodeable Code Pairs 期刊论文 IEEE Transactions on Information Theory, 2017, 页码: 1 作者: PerAustrin; PetteriKaski; JesperNederlof; MikkoKoivisto 收藏 \| 浏览/下载：7/0 \| 提交时间：2019/12/24 Upper bound Computer science Electronic mail Adders Information technology Hypercubes Entropy Additive combinatorics binary adder channel isoperimetric inequality uniquely decodeable code pair zero-error capacity
	Multi-valued logic design methodology with double negative differential resistance transistors 期刊论文 MICRO & NANO LETTERS, 2017, 卷号: 12, 期号: 10 作者: Ji, Yuchao; Chang, Sheng; Wang, Hao; Huang, Qijun; He, Jin 收藏 \| 浏览/下载：2/0 \| 提交时间：2019/12/05 logic gates negative resistance circuits field effect transistors adders multivalued logic design methodology binary logic logic density circuit structure double negative differential resistance field effect transistor monostable-multistable transition logic element MMLE MVL ternary logic gates ternary four-input full adder function circuits binary circuit ternary circuit information load ability

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