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清华大学 [27]

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	Prototype design of readout electronics for Zero Degree Calorimeter in the HIRFL-CSR external-target experiment 期刊论文 JOURNAL OF INSTRUMENTATION, 2021, 卷号: 16, 期号: 8, 页码: 14 作者: Zhu, S. H.; Yang, H. B.; Pei, H.; Zhao, C. X.; Li, X. Q. 收藏 \| 浏览/下载：12/0 \| 提交时间：2021/12/08 Analogue electronic circuits Digital signal processing (DSP) Front-end electronics for detector readout Modular electronics
	Joint background calibration of gain and timing mismatch errors with low hardware cost for time-interleaved ADCs 期刊论文 IET CIRCUITS DEVICES & SYSTEMS, 2019, 卷号: 13, 页码: 203-210 作者: Zhang, Jie; Zhang, Hong; Yang, Bo; Zhang, Ruizhi 收藏 \| 浏览/下载：27/0 \| 提交时间：2019/11/19 offset mismatch mixed-signal calibration gain mismatch error estimation two-channel TI ADC calibration 0 bit hardware cost reduction timing mismatch error estimation time measurement analogue-digital conversion gain measurement word length 12 joint background calibration scheme arithmetic blocks time-interleaved analogue-to-digital conversion cost reduction multitap digital filters
	V-aq-based tri-level switching scheme for SAR ADC 期刊论文 ELECTRONICS LETTERS, 2018, 卷号: 54, 页码: 66-68 作者: Zhao, Jinqiang[1]; Mei, Niansong[2]; Zhang, Zhaofeng[3]; Meng, Lingqin[4] 收藏 \| 浏览/下载：5/0 \| 提交时间：2019/04/24 analogue-digital conversion switching circuits V-aq-based trilevel switching scheme SAR ADC area-efficient trilevel switching scheme successive approximation register analogue-to-digital converter least significant bit capacitor
	A novel feed-forward segmented digital automatic gain control algorithm for long-term evolution digital radio-over-fibre systems 期刊论文 IET COMMUNICATIONS, 2017, 卷号: 11, 页码: 2362-2369 作者: Wang, Jie; Hu, XiaoGuang; Guan, Enyi; Li, Tongyun; Ding, ZhuShun 收藏 \| 浏览/下载：4/0 \| 提交时间：2019/12/30 Long Term Evolution 5G mobile communication 4G mobile communication telecommunication control automatic gain control digital control radio-over-fibre feedforward field programmable gate arrays free-space optical communication analogue-digital conversion feedforward segmented digital automatic gain control algorithm Long-Term Evolution digital radio-over-fibre systems FSD-AGC algorithm LTE DRoF systems real-time field programmable gate arrays analogue-to-digital converter
	A 14-bit 8-column shared SAR ADC for 640×512 IRFPA 其他 2016-01-01 Zhaokai Liu; Wengao Lu; Yuze Niu; Dahe Liu; Yacong Zhang; Zhongjian Chen 收藏 \| 浏览/下载：7/0 \| 提交时间：2017/12/03 capacitance disturbance Infrared cancel converter analogue mutual IRFPA offset successive capacitance disturbance Infrared cancel converter analogue mutual IRFPA offset successive
	14-bit 20 mu W column-level two-step ADC for 640 x 512 IRFPA 期刊论文 ELECTRONICS LETTERS, 2015 Wang, Guannan; Lu, Wengao; Zhang, Luya; Zhang, Yacong; Chen, Zhongjian 收藏 \| 浏览/下载：6/0 \| 提交时间：2017/12/03 focal planes infrared detectors analogue-digital conversion IRFPA column-level two-step ADC structure 16-column-shared flash ADC staggered code staggered correction dynamic comparator power dissipation SAR conversion cycle time input voltage variation charge redistribution structure infrared focal-plane array word length 14 bit power 20 muW word length 6 bit power 0 386 muW voltage 1 8 V voltage 5 V power 5 966 muW size 0 18 mum
	Low-power, high-speed dual modulus prescalers based on branch-merged true single-phase clocked scheme 期刊论文 electronics letters, 2015 Jia, Song; Yan, Shilin; Wang, Yuan; Zhang, Ganggang 收藏 \| 浏览/下载：4/0 \| 提交时间：2015/11/13 analogue-digital conversion digital-analogue conversion energy-efficient capacitor-splitting DAC scheme SAR ADC accuracy digital-to-analogue converter successive approximation register analogue-to-digital converter split-capacitive-array DAC structure energy-efficient-up transition switching energy reduction area reduction third-reference voltage least significant bit FREQUENCY-DIVIDER
	Current-mode-based programming interpolation circuit 期刊论文 ELECTRONICS LETTERS, 2015, 卷号: 51, 页码: 1977-+ 作者: Li, Hongge; Wang, Xiang 收藏 \| 浏览/下载：3/0 \| 提交时间：2020/01/06 current-mode circuits programmable circuits interpolation polynomials digital-analogue conversion CMOS integrated circuits current-mode-based programming interpolation circuit polynomial interpolation current-modulation subDAC grey-level voltage programming interpolation cell CMOS process DNL INL LSB digital-analog converter complementary metal oxide semiconductor differential nonlinearity integral nonlinearity least significant bit size 0 35 mum
	Energy-efficient idle listening scheme using 1 bit sampling in 60 GHz wireless local area network 期刊论文 IET COMMUNICATIONS, 2015, 卷号: 9, 页码: 219-226 作者: Gao, Bo; Xiao, Zhenyu; Su, Li; Jin, Depeng; Zeng, Lieguang 收藏 \| 浏览/下载：16/0 \| 提交时间：2019/12/30 wireless LAN telecommunication power management analogue-digital conversion radio receivers energy consumption packet radio networks demodulation wireless local area network energy-efficient idle listening scheme power-hungry ultra-high-speed analogue-to-digital converters energy consumption 1 bit-sampling IL scheme sampling receiver packet detection algorithm generalised likelihood ratio test ADC 1BS-GLRT algorithm receiver switches multibit sampling precision demodu
	A novel 4-bit sub-ranging delay-line based ADC for DC-DC converter 其他 2014-01-01 Gong, Lixing; Gai, Weixin 收藏 \| 浏览/下载：3/0 \| 提交时间：2015/11/13

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