A 1000 fps Vision Chip Based on a Dynamically Reconfigurable Hybrid Architecture Comprising a PE Array Processor and Self-Organizing Map Neural Network

	A 1000 fps Vision Chip Based on a Dynamically Reconfigurable Hybrid Architecture Comprising a PE Array Processor and Self-Organizing Map Neural Network
	Shi, C ; Yang, J ; Han, Y ; Cao, ZX ; Qin, Q ; Liu, LY ; Wu, NJ ; Wang, ZH
刊名	ieee journal of solid-state circuits
	2014
卷号	49 期号:9 页码:2067-2082
学科主题	半导体物理
收录类别	SCI
语种	英语
公开日期	2015-03-25
内容类型	期刊论文
源URL	[http://ir.semi.ac.cn/handle/172111/26214]
专题	半导体研究所_半导体超晶格国家重点实验室
推荐引用方式 GB/T 7714	Shi, C,Yang, J,Han, Y,et al. A 1000 fps Vision Chip Based on a Dynamically Reconfigurable Hybrid Architecture Comprising a PE Array Processor and Self-Organizing Map Neural Network[J]. ieee journal of solid-state circuits,2014,49(9):2067-2082.
APA	Shi, C.,Yang, J.,Han, Y.,Cao, ZX.,Qin, Q.,...&Wang, ZH.(2014).A 1000 fps Vision Chip Based on a Dynamically Reconfigurable Hybrid Architecture Comprising a PE Array Processor and Self-Organizing Map Neural Network.ieee journal of solid-state circuits,49(9),2067-2082.
MLA	Shi, C,et al."A 1000 fps Vision Chip Based on a Dynamically Reconfigurable Hybrid Architecture Comprising a PE Array Processor and Self-Organizing Map Neural Network".ieee journal of solid-state circuits 49.9(2014):2067-2082.