High-k Spacer Consideration of Ultrascaled Gate-All-Around Junctionless Transistor in Ballistic Regime

doi:10.1109/TED.2018.2873717

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	High-k Spacer Consideration of Ultrascaled Gate-All-Around Junctionless Transistor in Ballistic Regime
	Yang YM(杨育梅)
刊名	IEEE TRANSACTIONS ON ELECTRON DEVICES
	2018-12
卷号	65 期号:12 页码:5282-5288
关键词	Ballistics Dielectric materials Drain current Gate dielectrics MOSFET devices Poisson equation Shims Direct current performance High- k junctionless Junctionless transistors Non-equilibrium green functions Nonequilibrium green function formalisms Quantum simulators Subthreshold characteristics
ISSN号	00189383
DOI	10.1109/TED.2018.2873717
英文摘要	In this paper, we investigate the impact of spacer dielectrics on the ultrascaled silicon gate-all-around junctionless transistor in the ballistic regime based on the in-house 3-D quantum simulator that self-consistently solves mode-space nonequilibrium Green function formalism and Poisson's equation. Then, the impact of device parameters, such as lengths of source/drain region and channel, channel width, and nanowire direction, on the static performance is also discussed in detail. An available range of spacer dielectric constant is further selected. Results show that the high-k spacer introduced in the ultrascaled junctionless transistor can effectively enhance the direct-current performance of the device and suppress the variation of drain current and subthreshold characteristics induced by the aforementioned device parameters. It will be a great benefit for the junctionless device with a gate-all-around structure as the scaling continues to approach the end of MOSFETs. © 2018 IEEE.
WOS研究方向	Engineering ; Physics
语种	英语
出版者	Institute of Electrical and Electronics Engineers Inc., United States
WOS记录号	WOS:000451255200003
内容类型	期刊论文
源URL	[http://ir.lut.edu.cn/handle/2XXMBERH/110772]
专题	理学院
推荐引用方式 GB/T 7714	Yang YM. High-k Spacer Consideration of Ultrascaled Gate-All-Around Junctionless Transistor in Ballistic Regime[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES,2018,65(12):5282-5288.
APA	Yang YM.(2018).High-k Spacer Consideration of Ultrascaled Gate-All-Around Junctionless Transistor in Ballistic Regime.IEEE TRANSACTIONS ON ELECTRON DEVICES,65(12),5282-5288.
MLA	Yang YM."High-k Spacer Consideration of Ultrascaled Gate-All-Around Junctionless Transistor in Ballistic Regime".IEEE TRANSACTIONS ON ELECTRON DEVICES 65.12(2018):5282-5288.