A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration
Wu, Bi1,2; Dai, Pengcheng1,2; Cheng, Yuanqing1; Wang, Ying3; Yang, Jianlei2,4; Wang, Zhaohao1,2; Liu, Dijun5; Zhao, Weisheng1,2
刊名IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
2020-04-01
卷号39期号:4页码:803-815
关键词System-on-chip Computer architecture Magnetic tunneling Transistors Switches Thermal sensors Organizations Cache data migration low power spin transfer torque magnetic memory (STT-MRAM) thermal gradient
ISSN号0278-0070
DOI10.1109/TCAD.2019.2897707
英文摘要As the speed gap of the modern processor and the off-chip main memory enlarges, on-chip cache capacity increases to sustain the performance scaling. As a result, the cache power occupies a large portion of the total power budget. Spin transfer torque magnetic memory (STT-MRAM) is proposed as a promising solution for the low power cache design due to its high integration density and ultralow leakage power. Nevertheless, the high write power and latency of STT-MRAM become new barriers for the commercialization of this emerging technology. In this paper, we investigate the thermal effect on the access performance of STT-MRAM, and observe that the temperature can affect the write delay and energy significantly. Then, we explore the nonuniform cache access (NUCA) design of the chip-multiprocessors with STT-MRAM-based last level cache (LLC). A thermal aware data migration policy, called "Thermosiphon," which takes advantage of the thermal property of STT-MRAM, is proposed to reduce the LLC write energy. This policy splits the LLC into different regions dynamically based on the thermal distribution monitored by thermal sensors available on-chip, and adaptively migrates write intensive data among different thermal regions considering the thermal gradient. Compared to the conventional NUCA design, our proposed design can save 41.2% write energy at most and 13.01% on average with negligible hardware overhead.
资助项目National Natural Science Foundation of China[61401008] ; National Natural Science Foundation of China[61704005] ; National Natural Science Foundation of China[61571023] ; Beijing Natural Science Foundation[4192035] ; International Collaboration Project[B16001] ; National Key Technology Program of China[2017ZX01032101] ; Special Foundation of Beijing Municipal Science and Technology Commission[Z161100000216149] ; State Key Laboratory of Computer Architecture, Institute of Computing Technology, Chinese Academy of Sciences[CARCH201602]
WOS研究方向Computer Science ; Engineering
语种英语
出版者IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
WOS记录号WOS:000522191600005
内容类型期刊论文
源URL[http://119.78.100.204/handle/2XEOYT63/14042]  
专题中国科学院计算技术研究所期刊论文_英文
通讯作者Zhao, Weisheng
作者单位1.Beihang Univ, Sch Microelect, Beijing 100191, Peoples R China
2.Beihang Univ, Fert Beijing Inst, BDBC, Beijing 100191, Peoples R China
3.Chinese Acad Sci, Inst Comp Technol, Beijing 100190, Peoples R China
4.Beihang Univ, Sch Comp Sci & Engn, Beijing 100191, Peoples R China
5.China Acad Informat & Commun Technol, Beijing 100191, Peoples R China
推荐引用方式
GB/T 7714
Wu, Bi,Dai, Pengcheng,Cheng, Yuanqing,et al. A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration[J]. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS,2020,39(4):803-815.
APA Wu, Bi.,Dai, Pengcheng.,Cheng, Yuanqing.,Wang, Ying.,Yang, Jianlei.,...&Zhao, Weisheng.(2020).A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration.IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS,39(4),803-815.
MLA Wu, Bi,et al."A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration".IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 39.4(2020):803-815.
个性服务
查看访问统计
相关权益政策
暂无数据
收藏/分享
所有评论 (0)
暂无评论
 

除非特别说明,本系统中所有内容都受版权保护,并保留所有权利。


©版权所有 ©2017 CSpace - Powered by CSpace