The 6T SRAM cell with fast access speed and silicon-oxide-nitride-oxide-Silicon (SONOS) cell with nonvolatility in a 130-nm commercial-off-the-shelf (COTS) nonvolatile SRAM (NVSRAM) is exposed to heavy ion irradiation under different test conditions. In 6T SRAM mode, the influence of linear energy transfer (LET), supply voltage, ambient temperature, and periphery circuits on single-event effects (SEE) is studied and analyzed. The anomaly of multiple upsets proportion with increasing the LET value may be ascribed to the difference of ion track structure. The observed nonmonotonic relationship between the upset cross section and supply voltage can be explained by a competing mechanism of critical charge and collected charge in a sensitive node. In SONOS nonvolatile mode, the upset threshold of 60.9 MeV/(mg/cm(2)) and two types of errors are observed. The recoverable upset error may be caused by ion-induced discharge of nonvolatile cell and the hard error that can be annealed to vanish in room temperature probably results from the ion-induced charge trapping in oxide. The above results show that the 6T SRAM cell in this NVSRAM is vulnerable to SEE, whereas the SONOS nonvolatile cell is quite resistant. Based on the prediction of space upset rate, the potential applications and issues of this COTS NVSRAM and deep sub-micrometer SONOS process in space component are discussed.