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	Planarization of backside emitting vcsel and method of manufacturing the same for array application
	PAO, YI-CHING
	2019-08-01
著作权人	OEPIC SEMICONDUCTORS, INC.
专利号	US20190237936A1
国家	美国
文献子类	发明申请
其他题名	Planarization of backside emitting vcsel and method of manufacturing the same for array application
英文摘要	A method of forming a flip chip backside Vertical Cavity Surface Emitting Laser (VCSEL) package comprising: forming a VCSEL pillar array; applying a dielectric layer to the VCSEL pillar array, the dielectric layer filling trenches in between pillars forming the VCSEL pillar array and covering the pillars; planarizing the VCSEL pillar array to remove the dielectric layer covering the pillars exposing a metal layer on a top surface of the pillars; applying a metal coating on the metal layer on a top surface of the pillars, the metal layer defining a contact pattern of the VCSEL pillar array; and applying solder on the metal coating to flip chip mount the VCSEL pillar array to a substrate package.
公开日期	2019-08-01
申请日期	2019-01-28
状态	申请中
内容类型	专利
源URL	[http://ir.opt.ac.cn/handle/181661/55410]
专题	半导体激光器专利数据库
作者单位	OEPIC SEMICONDUCTORS, INC.
推荐引用方式 GB/T 7714	PAO, YI-CHING. Planarization of backside emitting vcsel and method of manufacturing the same for array application. US20190237936A1. 2019-08-01.

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