| Hardware Implementation of Single Iterated Multiplicative Inverse Square Root | |
| Luo, Jun; Huang, Qijun; Luo, Hongwei; Zhi, Yue; Wang, Xiaoqiang | |
| 刊名 | ELEKTRONIKA IR ELEKTROTECHNIKA
 |
| 2017 | |
| 卷号 | 23期号:4 |
| 关键词 | Digital circuits fixed-point arithmetic piecewise linear approximation hardware |
| ISSN号 | 1392-1215 |
| DOI | 10.5755/j01.eie.23.4.18717 |
| URL标识 | 查看原文 |
| 收录类别 | SCIE |
| 语种 | 英语 |
| 内容类型 | 期刊论文 |
| URI标识 | http://www.corc.org.cn/handle/1471x/4112380 |
| 专题 | 武汉大学 |
| 推荐引用方式 GB/T 7714 | Luo, Jun,Huang, Qijun,Luo, Hongwei,et al. Hardware Implementation of Single Iterated Multiplicative Inverse Square Root[J]. ELEKTRONIKA IR ELEKTROTECHNIKA,2017,23(4). |
| APA | Luo, Jun,Huang, Qijun,Luo, Hongwei,Zhi, Yue,&Wang, Xiaoqiang.(2017).Hardware Implementation of Single Iterated Multiplicative Inverse Square Root.ELEKTRONIKA IR ELEKTROTECHNIKA,23(4). |
| MLA | Luo, Jun,et al."Hardware Implementation of Single Iterated Multiplicative Inverse Square Root".ELEKTRONIKA IR ELEKTROTECHNIKA 23.4(2017). |
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