The Optimization of Gate All Around-L-Shaped Bottom Select Transistor in 3D NAND Flash Memory

	The Optimization of Gate All Around-L-Shaped Bottom Select Transistor in 3D NAND Flash Memory
	Huo ZL(霍宗亮); Xia ZL(夏志良); Chen GX(陈国星); Zhang Y(张瑜); Jiang DD(姜丹丹); Jin L(靳磊); Zou XQ(邹兴奇)
刊名	Journal of Nanoscience and Nanotechnology
	2018-08-01
文献子类	期刊论文
内容类型	期刊论文
源URL	[http://159.226.55.107/handle/172511/19266]
专题	微电子研究所_存储器研发中心
推荐引用方式 GB/T 7714	Huo ZL,Xia ZL,Chen GX,et al. The Optimization of Gate All Around-L-Shaped Bottom Select Transistor in 3D NAND Flash Memory[J]. Journal of Nanoscience and Nanotechnology,2018.
APA	霍宗亮.,夏志良.,陈国星.,张瑜.,姜丹丹.,...&邹兴奇.(2018).The Optimization of Gate All Around-L-Shaped Bottom Select Transistor in 3D NAND Flash Memory.Journal of Nanoscience and Nanotechnology.
MLA	霍宗亮,et al."The Optimization of Gate All Around-L-Shaped Bottom Select Transistor in 3D NAND Flash Memory".Journal of Nanoscience and Nanotechnology (2018).