ESD Reliability Improvement of the 0.25-mu m 60-V Power nLDMOS with Discrete Embedded SCRs Separated by STI Structures | |
Chen, Shen-Li ; Wu, Yi-Cih ; Lin, Jia-Ming ; Yang, Chih-Hung ; Yen, Chih-Ying ; Chen, Kuei-Jyun ; Chen, Hung-Wei | |
2016 | |
关键词 | Electrostatic discharge (ESD) N-channel lateral-diffused MOSFET (nLDMOS) Secondary breakdown current (I-t2) Shallow-trench isolation (STI) Silicon-controller rectifier (SCR) |
英文摘要 | In this paper, the electrostatic-discharge (ESD) robustness improvement by modulating the drain-side embedded SCR of an HV nLDMOS device is investigated via a TSMC 0.25 mu m 60 V process. After a systematic layout design and data analysis, it can be found that the holding voltage (V-h) of an nLDMOS with a parasitic SCR "npn"-arranged type & thin oxide (OD) discrete (i.e. separated by the shallow-trench isolation (STI) structure) distribution in the drain-side have greatly increased with the parasitic SCR OD decreasing. Therefore, a high Vh value in the OD discrete parameter 2 (DIS-2) can be obtained about 13.3 V. On the other hand, the trigger voltage (V-t1) values and the holding voltage (V-h) values of the nLDMOS DUTs with a parasitic SCR "pnp"-arranged type & OD discrete distribution in the drain-side are slowly increased with the parasitic-SCR OD decreasing. The best Vh value in the "pnp"arranged type & OD discrete parameter 2 (DIS-2) is about 14.4 V. Meanwhile, the secondary breakdown current (I-t2) values of this type are greater than 7 A except for the OD discrete parameter 2 and 3. Therefore, an appropriate layout of nLDMOS embedded with a drain-side "pnp" arranged type & OD discrete distribution that can yield high ESD and latch-up (LU) robustness levels.; CPCI-S(ISTP); jackchen@nuu.edu.tw |
语种 | 英语 |
出处 | 8th IEEE International Power Electronics and Motion Control Conference (IPEMC-ECCE Asia) |
内容类型 | 其他 |
源URL | [http://ir.pku.edu.cn/handle/20.500.11897/459819] |
专题 | 软件与微电子学院 |
推荐引用方式 GB/T 7714 | Chen, Shen-Li,Wu, Yi-Cih,Lin, Jia-Ming,et al. ESD Reliability Improvement of the 0.25-mu m 60-V Power nLDMOS with Discrete Embedded SCRs Separated by STI Structures. 2016-01-01. |
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