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GIDL Challenge of GAA SNWT For Low Power Application; GIDL Challenge of GAA SNWT For Low Power Application
Ming Li ; Jiewen Fan ; Yuancheng Yang ; Gong Chen ; Ru Huang
2016
关键词drain transistor junction overcome suppressed extremely modulated leakage overlap TCAD drain transistor junction overcome suppressed extremely modulated leakage overlap TCAD
英文摘要In this paper, the challenge of gate-all-around nanowire transistor for low power application is uncovered and discussed from experimental and TCAD simulation. For promising low power application, gate-all-around nanowire transistor faces more difficulties than expected due to abnormal gate-induced-drain-leakage current behavior. The study shows that as nanowire diameter shrinks, GIDL current will become worse rather than suppressed. The gate coupling modulated drain-to-body electric field is found responsible for the increased GIDL current in the extremely scaled nanowire. To overcome the challenge of GAA SNWT in low power application, a practical design is proposed by optimization of overlap length and drain junction gradient considering the trade-off between short channel effect and performance.; In this paper, the challenge of gate-all-around nanowire transistor for low power application is uncovered and discussed from experimental and TCAD simulation. For promising low power application, gate-all-around nanowire transistor faces more difficulties than expected due to abnormal gate-induced-drain-leakage current behavior. The study shows that as nanowire diameter shrinks, GIDL current will become worse rather than suppressed. The gate coupling modulated drain-to-body electric field is found respons; IEEE Beijing Section; 1
语种英语
内容类型其他
源URL[http://ir.pku.edu.cn/handle/20.500.11897/479785]  
专题信息科学技术学院
推荐引用方式
GB/T 7714
Ming Li,Jiewen Fan,Yuancheng Yang,et al. GIDL Challenge of GAA SNWT For Low Power Application, GIDL Challenge of GAA SNWT For Low Power Application. 2016-01-01.
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