A 6.5-GHz Digitally-Controlled Oscillator with Supply Sensitivity of 0.0071%-f(DCO)/1%-V-DD | |
Huang, Jichao ; Gai, Weixin ; Tang, Liangxiao ; Shi, Linqi ; Zhao, Tong ; Zhang, Xing | |
2016 | |
关键词 | DCO current compensation supply-noise rejection process immunity low phase noise LOW-POWER PLL |
英文摘要 | This paper presents a 65nm CMOS 6.5GHz digitally-controlled oscillator (DCO) with static and dynamic supply sensitivity of 0.00138%-f(DCO)/1%-V-DD and 0.0071%-f(DCO)/1%-V-DD respectively. By regulating the supply current of DCO, the proposed technique achieves high supply-noise rejection performance. In addition, the proposed DCO has a strong immunity against process and achieves satisfied performance at different corners. The proposed DCO system achieves a phase noise of -107.4dBc/Hz @1MHz and -130.1dBc/Hz @10MHz offset from the carrier and operates from 6.3 GHz to 6.8 GHz, while consuming 3.2mW from a I.2V supply at 6.5 GHz.; CPCI-S(ISTP); wgai@pku.edu.cn; 199-202 |
语种 | 英语 |
出处 | IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC) |
内容类型 | 其他 |
源URL | [http://ir.pku.edu.cn/handle/20.500.11897/459771] |
专题 | 信息科学技术学院 |
推荐引用方式 GB/T 7714 | Huang, Jichao,Gai, Weixin,Tang, Liangxiao,et al. A 6.5-GHz Digitally-Controlled Oscillator with Supply Sensitivity of 0.0071%-f(DCO)/1%-V-DD. 2016-01-01. |
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