CORC  > 北京大学  > 信息科学技术学院
Exploring Main Memory Design Based on Racetrack Memory Technology
Hu, Qingda ; Sung, Guangyu ; Shu, Jiwu ; Zhang, Chao
2016
关键词Main Memory Racetrack Shifts Performance Energy
英文摘要Emerging non-volatile memories (NVMs), which include PC-RAM and STT-RAM, have been proposed to replace DRAM, mainly because they have better scalability and lower standby power. However, previous research has demonstrated that these NVMs cannot completely replace DRAM due to either lifetime/performance (PCRAM) or density (STTRAM) issues. Recently, a new type of emerging NVM, called Racetrack Memory (RM), has attracted more and more attention of memory researchers because it has ultra-high density and fast access speed without the write cycle issue. However, there lacks research on how to leverage RM for main memory. To this end, we explore main memory design based on RM technology in both circuit and architecture levels. In the circuit level, we propose the structure of the RM based main memory and investigate different design parameters. In the architecture level, we design a simple and efficient shift-sense address mapping policy to reduce 95% shift operations for performance improvement and power saving. At the same time, we analyze the efficiency of existing optimization strategies for NVM main memory. Our experiments show that RM can outperform DRAM for main memory, in respect of density, performance, and energy efficiency.; EI; CPCI-S(ISTP); hqd13@mails.tsinghua.edu.cn; gsun@pku.edu.cn; shujw@tsinghua.edu.cn; zhang.chao@pku.edu.cn; 397-402; 18-20-May-2016
语种英语
出处26th ACM Great Lakes Symposium on VLSI (GLSVLSI)
DOI标识10.1145/2902961.2902967
内容类型其他
源URL[http://ir.pku.edu.cn/handle/20.500.11897/436169]  
专题信息科学技术学院
推荐引用方式
GB/T 7714
Hu, Qingda,Sung, Guangyu,Shu, Jiwu,et al. Exploring Main Memory Design Based on Racetrack Memory Technology. 2016-01-01.
个性服务
查看访问统计
相关权益政策
暂无数据
收藏/分享
所有评论 (0)
暂无评论
 

除非特别说明,本系统中所有内容都受版权保护,并保留所有权利。


©版权所有 ©2017 CSpace - Powered by CSpace