Electrode/oxide interface engineering by inserting single-layer graphene: Application for HfOx-based resistive random access memory | |
Chen, Hong-Yu ; Tian, He ; Gao, Bin ; Yu, Shimeng ; Liang, Jiale ; Kang, Jinfeng ; Zhang, Yuegang ; Ren, Tian-Ling ; Wong, H.-S. Philip | |
2012 | |
英文摘要 | Electrode/oxide interface with inserted single-layer graphene (SLG) increases low resistance state (LRS) resistance (> 1M) due to its intrinsically high out-of-plane resistance in HfOx-based resistive random access memory (RRAM). This interface engineering technique enables the reduction of the RESET current by 22 times and the programming power consumption by 47 times. The interface between oxide layer and metal electrode is studied using Ramen spectroscopy coupled with electrical measurement. Raman mapping and single point measurements show noticeable changes in both D-band and G-band signals of SLG during electrical cycling. This observation suggests a possible interaction of oxygen migrated from the metal oxide with the graphene. This work illustrates that interface engineering design plays an important role for RRAM material selection in addition to exploring different metal oxides or metal electrode materials for RRAM. ? 2012 IEEE.; EI; 0 |
语种 | 英语 |
DOI标识 | 10.1109/IEDM.2012.6479081 |
内容类型 | 其他 |
源URL | [http://ir.pku.edu.cn/handle/20.500.11897/410865] |
专题 | 信息科学技术学院 |
推荐引用方式 GB/T 7714 | Chen, Hong-Yu,Tian, He,Gao, Bin,et al. Electrode/oxide interface engineering by inserting single-layer graphene: Application for HfOx-based resistive random access memory. 2012-01-01. |
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