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	LFSR-based deterministic TPG for two-pattern testing
	Li, XW ; Cheung, PYS ; Fujiwara, H
	2000
关键词	built-in self-test two-pattern test configurable LFSR path delay faults
英文摘要	This paper proposes an approach to designing a cost-effective deterministic test pattern generator (TPG) for two-pattern testing. Given a set of pre-generated test-pair set (obtained by an ATPG tool) with a pre-determined (path delay) fault coverage, a simple TPG is synthesized to apply the given test-pair set in a minimal test time. To achieve this objective, a configurable linear feedback shift register (CLFSR) structure is used. Techniques are developed to synthesize such a TPG, which is used to generate an unordered deterministic test-pair set. The resulting TPG is efficient in terms of hardware size and speed performance. Experiments on benchmark circuits indicate that TPG designed using the proposed procedure obtain high path delay fault coverage in short test length.; http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcApp=PARTNER_APP&SrcAuth=LinksAMR&KeyUT=WOS:000089239600004&DestLinkType=FullRecord&DestApp=ALL_WOS&UsrCustomerID=8e1609b174ce4e31116a60747a720701 ; Engineering, Electrical & Electronic; SCI(E); EI; CPCI-S(ISTP); 3
语种	英语
DOI标识	10.1023/A:1008356313212
内容类型	其他
源URL	[http://ir.pku.edu.cn/handle/20.500.11897/152115]
专题	信息科学技术学院
推荐引用方式 GB/T 7714	Li, XW,Cheung, PYS,Fujiwara, H. LFSR-based deterministic TPG for two-pattern testing. 2000-01-01.

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