Metal Floating Gate Memory Device With SiO2/HfO2 Dual-Layer as Engineered Tunneling Barrier

	Metal Floating Gate Memory Device With SiO2/HfO2 Dual-Layer as Engineered Tunneling Barrier
	Chen, GX; Huo, ZL; Jin, L; Han, YL; Li, XK; Liu, S; Liu, M
刊名	IEEE ELECTRON DEVICE LETTERS
	2014-07
卷号	35 期号:7 页码:744-746
关键词	Metal floating gate memory engineered tunneling barrier
ISSN号	0741-3106
通讯作者	Chen, GX (reprint author), Chinese Acad Sci, Inst Microelect, Beijing 100029, Peoples R China.
学科主题	Engineering
语种	英语
WOS记录号	WOS:000338662100019
内容类型	期刊论文
源URL	[http://202.201.7.4/handle/262010/106655]
专题	物理科学与技术学院_期刊论文
推荐引用方式 GB/T 7714	Chen, GX,Huo, ZL,Jin, L,et al. Metal Floating Gate Memory Device With SiO2/HfO2 Dual-Layer as Engineered Tunneling Barrier[J]. IEEE ELECTRON DEVICE LETTERS,2014,35(7):744-746.
APA	Chen, GX.,Huo, ZL.,Jin, L.,Han, YL.,Li, XK.,...&Liu, M.(2014).Metal Floating Gate Memory Device With SiO2/HfO2 Dual-Layer as Engineered Tunneling Barrier.IEEE ELECTRON DEVICE LETTERS,35(7),744-746.
MLA	Chen, GX,et al."Metal Floating Gate Memory Device With SiO2/HfO2 Dual-Layer as Engineered Tunneling Barrier".IEEE ELECTRON DEVICE LETTERS 35.7(2014):744-746.