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	Implementation of multi-standard video decoder on a heterogeneous coarse-grained reconfigurable processor
	LIU LeiBo ; CHEN YingJie ; WANG Dong ; YIN ShouYi ; WANG Xing ; WANG Long ; LEI Hao ; CAO Peng ; WEI ShaoJun ; LIU LeiBo ; CHEN YingJie ; WANG Dong ; YIN ShouYi ; WANG Xing ; WANG Long ; LEI Hao ; CAO Peng ; WEI ShaoJun
	2016-03-30 ; 2016-03-30
关键词	multi-standard video decoder coarse-grained reconfigurable multimedia system computationintensive tasks parallelization and pipelining HW/SW partitioning TN919.81
其他题名	Implementation of multi-standard video decoder on a heterogeneous coarse-grained reconfigurable processor
中文摘要	This paper proposes a task-based hybrid parallel and hybrid pipeline(THPHP)scheme to implement multi-standard video algorithms,including MPEG-2,H.264,and audio video coding standard(AVS),on a heterogeneous coarse-grained reconfigurable processor,called the reconfigurable multimedia system(REMUS).The proposed schemes greatly improve decoding performance and satisfy the real-time requirements of various high-definition(HD)video decoding standards.In THPHP,we propose both a task-based hybrid parallel scheme,in which macro-block(MB)-level,block-level,and sub-block-level decoding tasks are parallelized to improve data processing throughput,and a hybrid pipeline scheme,in which slice-level,MB-level,block-level and sub-block-level computations are pipelined to improve efficiency.Computation-intensive tasks,such as motion compensation,intra prediction,inverse discrete cosine transform,reconstruction,and deblocking filter,are implemented on two reconfigurable processing units,which are the core computing engines of REMUS.Thanks to the proposed schemes,the implementations can achieve H.264 high profile(HP)1920�080@30 fps streams,AVS Jizhun profile(JP)1920�080@39 fps streams,and MPEG-2 main profile(MP)1920�080@41 fps streams when working at 200 MHz frequency.Compared with XPP-III(a commercial reconfigurable processor),when implementing H.264 HD decoding,the performance and energy efficiency on REMUS are improved by1.81譨nd 14.3�respectively.; This paper proposes a task-based hybrid parallel and hybrid pipeline(THPHP) scheme to implement multi-standard video algorithms,including MPEG-2,H.264,and audio video coding standard(AVS),on a heterogeneous coarse-grained reconfigurable processor,called the reconfigurable multimedia system(REMUS).The proposed schemes greatly improve decoding performance and satisfy the real-time requirements of various high-definition(HD) video decoding standards.In THPHP,we propose both a task-based hybrid parallel scheme,in which macro-block(MB)-level,block-level,and sub-block-level decoding tasks are parallelized to improve data processing throughput,and a hybrid pipeline scheme,in which slice-level,MB-level,block-level and sub-block-level computations are pipelined to improve efficiency.Computation-intensive tasks,such as motion compensation,intra prediction,inverse discrete cosine transform,reconstruction,and deblocking filter,are implemented on two reconfigurable processing units,which are the core computing engines of REMUS.Thanks to the proposed schemes,the implementations can achieve H.264 high profile(HP) 1920�080@30 fps streams,AVS Jizhun profile(JP) 1920�080@39 fps streams,and MPEG-2 main profile(MP) 1920�080@41 fps streams when working at 200 MHz frequency.Compared with XPP-III(a commercial reconfigurable processor),when implementing H.264 HD decoding,the performance and energy efficiency on REMUS are improved by1.81�and 14.3�respectively.
语种	英语 ; 英语
内容类型	期刊论文
源URL	[http://ir.lib.tsinghua.edu.cn/ir/item.do?handle=123456789/147039]
专题	清华大学
推荐引用方式 GB/T 7714	LIU LeiBo,CHEN YingJie,WANG Dong,et al. Implementation of multi-standard video decoder on a heterogeneous coarse-grained reconfigurable processor[J],2016, 2016.
APA	LIU LeiBo.,CHEN YingJie.,WANG Dong.,YIN ShouYi.,WANG Xing.,...&WEI ShaoJun.(2016).Implementation of multi-standard video decoder on a heterogeneous coarse-grained reconfigurable processor..
MLA	LIU LeiBo,et al."Implementation of multi-standard video decoder on a heterogeneous coarse-grained reconfigurable processor".(2016).

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