Fabricating Polymer Insulation Layer by Spin-coating for Through Silicon Vias
Guoping Zhang; Kun Jiang; Qiang Liu; Jinhui Li; Rong Sun; S. W. Ricky Lee. P. Wong
2015
会议名称IEEE Electronic Components and Technology Conference(ECTC)
会议地点美国
英文摘要This paper reports a fabrication process for the deposition of a polymer insulation layer on the sidewall of through silicon vias in wafer level packaging. The novolac resin based glue was used as precursor to prepare the insulation layer. The glue is a Newtonian fluid and has low viscosity (24 mPa*s @ 100 l/s) as well as low contact angle (25.9o) to silicon. The resultant polymer insulation layer has a shearing strength as high as 25.8 Kg/mm2. Furthermore, the polymer insulation layer exhibits good uniformity in thickness and roughness over the whole 8’’ wafer. On the conformal coating of the polymer insulation layer, the Ti/Cu seed layer and Cu conductive layer were fabricated by PVD and electroplating. Therefore, all the results show that the polymer materials could be a reliable and economical solution for the TSV insulator in the view of wafer level packaging.
收录类别EI
语种英语
内容类型会议论文
源URL[http://ir.siat.ac.cn:8080/handle/172644/6749]  
专题深圳先进技术研究院_集成所
作者单位2015
推荐引用方式
GB/T 7714
Guoping Zhang,Kun Jiang,Qiang Liu,et al. Fabricating Polymer Insulation Layer by Spin-coating for Through Silicon Vias[C]. 见:IEEE Electronic Components and Technology Conference(ECTC). 美国.
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